speaker-0: you

speaker-1: Hi everyone and welcome to Wearing Fluff Lops episode 1 I'm Ronan, your host and with me are Roni Lani, your host Hey Lani, how are you doing?

speaker-0: I'm pretty good. How about yourself? Before we dive into the boring stuff, here's a cool picture of us. Sort of. ⁓ Why don't we introduce ourselves to the audience before we start getting into the boring stuff? What do think?

speaker-1: Thank you. Not. Sure, ⁓ how about you start?

speaker-0: Okay, let me start. So ⁓ I started National Semiconductor and PMC Sierra, maybe a bunch of other things, sort of like nine to 10 years of hands-on R &D and chip design and mostly verification. Then I moved to the EDA world, to Synopsys, where I spent 15 years in the verification world, mostly software-driven verification. And for the last year or so, a little less. I'm consulting for the EDA industry. How about yourself Ronan? I think we have some overlaps there in our...

speaker-1: We do. So yeah, we both worked at the National Semiconductor and we know each other from there. And even though Yaron Ilani went to Synopsys and I went to Cadence, ⁓ we loved each other. In a way, in a good way. ⁓ I think that the first years at the National were so much time ago and you know, back then you could do architecture and then the design and then verification and then implementation and take it to tape out and take it to the lab and fibs and you know.

speaker-0: the testing facility to actually test the chip in the cleanroom or whatever with those funny...

speaker-1: Good times. And then I moved to the dark side, went to the EVA vendors and actually it's not dark at all. I loved working with all our customers. So I've been at Cadence for 14 years. Then at AWS, at AWS I looked at the semiconductor industry and nowadays I'm Iver. So yeah, that's about it. me

speaker-0: Great. So what are we going to talk about in this podcast?

speaker-1: I'll tell you what I thought about and you know I love hardware, I love chip design so I think everything that I would have liked to know throughout my career, ⁓ whether it's design, whether it's verification, or even if it's orthogonal to that and just, I don't know, let's say quantum or things that would be interesting as an engineer, ⁓ more tied to chip design. That's what I would love to talk about. What about you?

speaker-0: So of course I love the chip design world ⁓ and I love even more the EDA world. I think what I really, really like in EDA is the methodology part and all the advanced technologies that could give you ⁓ all those shift left technologies, things that are like breakthrough in terms of shortening ⁓ simulation time or other features ⁓ of verification. That's really... I love those things.

speaker-1: So I think, you know, another aspect and we would love, you know, the audience to chime in and, you know, reach out and if you guys have anything that you would want to hear about and we already have, you know, a of you who ask for specific things that we'll look into in the, you know, coming chapters. We'd love to hear from you and, you know, work from there. But ⁓ in this first chapter, ⁓ so we want to talk about verification and maybe in the next coming chapter we'll focus on verification. ⁓ But before we dive into that, Mirani, I wanted to ask you what is that?

speaker-0: ⁓ my God. ⁓ my God. You stole a picture from me. That's me. Yesterday, actually, at the after the blizzard, we got something like we got some 20 inches of snow here, which was extraordinary. think that they didn't get anything like that for 10 years or so. Luckily, I had my phone. It's called.

speaker-1: I'm You

speaker-0: Yeah, it's not too cold actually you get used to this quickly. mean it was like 33 Fahrenheit, like about one degree. Not too bad. I've done shoveling at much colder temperatures. So you can see that I'm not even wearing a hat and you know, pretty easy. It's a lot of work though. Luckily my phone was, I kept it in the house at home because the last time I went out to shovel my car I had the phone in my pocket and apparently my Galaxy phone is not that water resistant or snow resistant as I thought it was. As a lesson learned from this I'm gonna I'm gonna go for the iPhone 18 or whatever next time it comes out.

speaker-1: When does it come out? Do you remember? Well, you told me. We can ask Gemini.

speaker-0: Is it September? Or we can ask AI. So looks like indeed September. Wow, look at that numbers. 36 billion, wow, transistors.

speaker-1: So, yeah, let's briefly talk about this table. we can see here that every September, like a clock, a Swedish clock, iPhones are out year after year. But the other thing that I'm looking at is the transistor count, numbers of transistors throughout these generations. And the current iPhone 17 is about 30 billion transistors. which you know it's it's starts to be to be a lot and well, Gemini has estimation about the A20 if it's out indeed on September 2026 would be even higher than that.

speaker-0: Yeah, so you said for the iPhone 17, ⁓ so actually the AI told us that it's about 30 billion transistors, right?

speaker-1: Actually we double checked that, so yeah, we're pretty confident based on several things and we can talk to some friends within the industry to triangulate that, but let's assume 30 billion, yeah.

speaker-0: Okay, so a rough estimation of the amount of code would be like 10 to 15 million lines of code on the design side.

speaker-1: That's true. And if you take the ratio between a number of lines of design, lines of code and verification, the ratio is between five to 10 for verification. So that takes us to about 50 to 150 millions lines of system verilog, UVM or any other verification ⁓ language on top of the system verilog. And then of course you have firmware drivers and everything else on top of that. ⁓

speaker-0: a lot of code and we have to simulate all of that.

speaker-1: Elania, know you love graphs, so just before the graph I want to add, know, we talked about the iPhone, the 30 billion transistors, so they're much larger designs. For example, AWS was doing the Graviton 5 and it already has, you know, a few benchmarks within the industry talking about 132 billion transistors and NVIDIA is, the Blackwell Ultra is about 200 billion transistors. And you know, now to the graph that you love.

speaker-0: Yeah, so yeah, I love this graph because, you know, it shows actually how much time it takes to simulate the chip. the metric that we love in the EDA or in chip design in general is how much time it takes to simulate 1 million cycles of simulation. So for example, if you look at the iPhone there ⁓ by the little.

speaker-1: About 30 billion, right? ⁓

speaker-0: Yeah, about 30 billion or even more if it depends on the version. We're looking at a day and a half of simulating 1 million cycles. Yeah, what do we get for 1 million cycles? What can we see?

speaker-1: So I think 1 million cycles could be quite a long test. The regular tests probably are less, ⁓ half, even a bit less. But if you look at the boot, you look at firmware software tests, ⁓ or if you do a long reset and you take the full chip itself, so ⁓ yeah, you could get to hours ⁓ and even days and weeks if you take the multi-dice and take everything that is running in parallel. So it seems like we're about to hit the wall or maybe we already hit the wall ⁓ regarding runtime. ⁓ It is quite a challenge. And I think the debug and how to, if we want, if...

speaker-0: That's quite a challenge.

speaker-1: Apple wants to be ready every September with a new chip and tests are taking a day or hours. Just think about the debug cycles of how much time you have to wait until there's a failure. And if there's a failure, you have to wait that again and debug it again. So I'm not sure, does it converge? Would be interesting. So back to your phone in September, Ilana, you are a consultant. ⁓ If you were to say, you know, to advise to Apple, what should they do in order to be ready for your new phone? Please.

speaker-0: Yeah, well, Apple, I kind of know some of the folks at Apple, have many smart people there, they surely don't need my advice. But anyway, think one way to look at it is to make sure that we minimize the scope of the things we verify. So maybe we don't have to verify the entire chip, right? Maybe we can just test orthogonal flows.

speaker-1: Yeah, I mean I'm with you on that but you know there's always the other side. Do you compromise on quality or do you compromise on you know things that you're not running or black boxing or white boxing just because you know there's a limit to what you can run. So that's a question.

speaker-0: Yep, that's a good question. I think the other thing is sometimes you have to go to emulation and prototyping because you just can't reduce the scope of verification. have to use...

speaker-1: First of all, I think it's a must. With such big chips, it's a must, but then it becomes very costly and you can't buy as much emulation as you would have wished. looking at balancing that, ⁓ it's a great solution, but it's a very costly one. So, yeah, what else?

speaker-0: Yeah, it's always nice to find ⁓ new ways, maybe things that were never done before, to still accelerate the good old simulation, right?

speaker-1: Yeah, so here I have to say a disclaimer. I'm working for Hyper and with Belding, a fast simulator, but that's not the focus of our podcast and I don't want to talk about that now. So let's keep this point and we can't do anything in 2026 without AI, right?

speaker-0: Right. Yeah, I was just gonna say, what about AI? AI, probably the audience. What about AI? How can AI help us?

speaker-1: It's a good question and I think it would be interesting to hear from the audience. ⁓ Is it really working? Can you really debug with AI? Would that really shorten your cycle significantly? Those are all good questions.

speaker-0: Right. Yep. I agree. So where do we go from here?

speaker-1: ⁓ So, you know, we talked about Graviton, you know, I think the next chapter will have someone ⁓ that has experience building, you know, hyperscalers and big chips throughout his career. ⁓ And...

speaker-0: Wow. ⁓ that's the cockroach.

speaker-1: It should have been the bug but we got some feedback that it's a nasty cockroach and probably won't.

speaker-0: Give us some nightmares.

speaker-1: Yeah. So ⁓ we took the nice bug and probably will work with him. But we'd like to thank Daniel Joffe from OnSemi. Thank you, Daniel. ⁓ You were asking if we can talk about verification plans and how to build a good verification plan. on the next chapter, we'll focus about big SSEs and how to do that. And also check with our guest whether AI is there or ⁓ if it still has some ways to go. ⁓ I think we're done here. ⁓ That's it. Any last words, Ilani?

speaker-0: No, think if you want to catch us, can listen to the podcast on all the major streaming platforms, Apple, Spotify, YouTube, and you can also connect with us on Instagram, Facebook, and LinkedIn.

speaker-1: Well, it's our first episode and we're recording that before knowing if it really works, so it would be good to see if that really works. regarding all the social media stuff, maybe an overkill. We might drop a few, but for now this is where we can find us and we'll be happy to see you on our next episode. Thank you for being with us.

speaker-0: Thanks. See you in the next video.